UAV Computer Vision at the Edge: Development, Security, and Hardware Acceleration
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Date
2025
Authors
Okhrimenko, Mykhailo
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Abstract
UAVs operating in contested environments require edge computing systems that face challenges in computational performance, security, and power efficiency. This thesis presents three solutions to these challenges. We implemented secure boot on Rockchip-based SBC boards through Rockchip’s OTP memory, establishing irreversible firmware authentication. We developed a Hardware-in-the-Loop testing framework, integrating Gazebo simulation with physical hardware via custom OpenCV-GStreamer pipelines, enabling algorithm validation without risking UAV platforms. Finally, we conducted comparative benchmarking of hardware acceleration options to identify viable deployment solutions. Performance evaluation revealed significant differences between theoretical specifications and operational reality. The Rockchip’s integrated NPU achieved 18 FPS average performance—8.4x faster than CPU baseline—while consuming only 0.83W. Hailo-8L delivered 64 FPS at 1.48W but required active cooling. Secure boot validation successfully blocked all unsigned firmware attempts, confirming the security implementation. These findings demonstrate that integrated NPU architectures provide optimal thermal and power characteristics for UAV edge computing, while our HITL framework enables safe development of computer vision algorithms on target hardware.
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Keywords
UAVs, Rockchip-based SBC, Rockchip’s OTP memory, benchmarking, aster's thesis